Khalil-Hani M, Shaikh-Husin N. An Optimization Algorithm Based On Grid-Graphs For Minimizing Interconnect Delay In VLSI Layout Design. MJCS [Internet]. 2009 Jun. 1 [cited 2024 Nov. 24];22(1):19-33. Available from: https://adum.um.edu.my/index.php/MJCS/article/view/6351