Khalil-Hani, Mohamed, and Nasir Shaikh-Husin. “An Optimization Algorithm Based On Grid-Graphs For Minimizing Interconnect Delay In VLSI Layout Design”. Malaysian Journal of Computer Science 22, no. 1 (June 1, 2009): 19–33. Accessed November 24, 2024. https://adum.um.edu.my/index.php/MJCS/article/view/6351.